Any Support for booting from Spi Flash?

i have successful got it to detect spi now. The pins @ewp gave are not the same as mine. My board version is v1.2

GP21 - HOLD
GP20 - WP
GP19 - MOSI
GP18 - CLK
GP17 - CS
GP16 - MISO

1 Like

In case you missed the pinout:

They are exactly the same set of pins @ewp and I were talking about. Congratulations!

So, what is the capacity of the chip, for reference? I wonder if my w25q128 chip will do, because @ewp earlier mentioned a 8 MiB chip (GD25Q64E), obviously connected to a CV1800B-based board. :thinking:

w25Q256. I havent successfully flashed it yet because there is still a issue. I also have 8 MB and 16 MB chips but the 16 MB chips are 1.8v and I dont know if milkv has some switch to use 1.8v logic on spi pins

What im going to do now is try the chips on a different mcu to see if its a problem with milk v

1 Like

You dont :slight_smile:. I use 8 MB chips for network booting. They are large enough to hold U-Boot (and a Linux kernel if you need). I have them in DIP-8 for easy swapping. For local booting I use W25Q256JVEQ (32 MB NOR) and W25N02KVZEIR (256 MB NAND) with great success.

1 Like

This Mcu is really turning out to be such a headache lol.

It detects the spi chip but then shows this

U-Boot 2021.10 (Jul 30 2024 - 08:45:13 +0300)cvitek_cv180x

DRAM: 63.3 MiB
gd->relocaddr=0x823f3000. offset=0x21f3000
MMC: cv-sd@4310000: 0
Loading Environment from SPIFlash… spinor id = C2 20 19
SF: Detected MX25L25645G with page size 256 Bytes, erase size 4 KiB, total 32 MiB
*** Warning - bad CRC, using default environment

In: serial
Out: serial
Err: serial
Net:
Warning: ethernet@4070000 (eth0) using random MAC address - 1a:0b:33:ee:c3:55
eth0: ethernet@4070000
Hit any key to stop autoboot: 1  0

Resetting to default environment

Start SD downloading…
switch to partitions #0, OK
mmc0 is current device
433664 bytes read in 22 ms (18.8 MiB/s)
spinor id = C2 20 19
SF: Detected MX25L25645G with page size 256 Bytes, erase size 4 KiB, total 32 MiB
device 0 offset 0x0, size 0x69e00
jedec_spi_nor spi_flash@0:0: flash operation timed out
SPI flash failed in write step
sf update speed 0.10 MB/s
spinor id = C2 20 19
SF: Detected MX25L25645G with page size 256 Bytes, erase size 4 KiB, total 32 MiB
device 0 offset 0xa0000, size 0x400000
SF: 4194304 bytes @ 0xa0000 Read: OK
sf read speed 31.536 MB/s
Wrong Image Format for bootm command
ERROR: can’t get kernel image!

Error: “nandboot” not defined

Error: “emmcboot” not defined

1 Like

MX25L25645G is on the supported list. So SPI works and QSPI fails. Do you have all the quad SPI pins connected and in the correct places? How is your SPI NOR connected? IOB, PCB, etc.?

1 Like

I only have the Normal 4 pins connected. SI,SO,CLK and CS. The WP is connected to VCC.
It should work in this mode unless the milk v just forces Quad mode. on Stm32 it works fine, can erase, write and read.

1 Like

That explains your issue. You can check the U-Boot source code to confirm why. Please wire all pins as I indicated.

1 Like

how are the sf commands passing if its such an issue. Really this sdk has so much issues.

1 Like

Only a subset of the commands, e.g. I/O commands, use the quad pins. So far everything is working as documented. You can disable the quad access in the source code if you wish. That’s how I got the 8 MB DIP flash to work…

1 Like

I set the pins as you said but lol but here is the problem.

Start USB downloading…

start usb task!
NOTICE: cvi_usb_hw_init
INFO: waiting for connection …
INFO: detect vbus …
INFO: bulkBufAlloc: 0000000081bd7b40
INFO: cmdBufAlloc: 0000000081bd7d80
INFO: ep0BuffAlloc: 0000000081be4700
INFO: setup_buf: 0000000081bd7fc0
INFO: handler: 0000000081bd8040
INFO: cb0_buf: 0000000081bd8450
INFO: cb1_buf: 0000000081bd84e0
INFO: cb2_buf: 0000000081bd8570
INFO: rsp_buf: 0000000081bd8600
INFO: acm_buf: 0000000081bd8650
NOTICE: Overwrite fip_src to FIP_SRC_USB
NOTICE: fip_src 6
NOTICE: bind()
OTICE: Patch VID 3346
NOTICE: Patch VID 3346
NOTICE: USB enumeration done
NOTICE: connection speed: 3
NOTICE: CVI_USB_PRG_CMD
NOTICE: run command: setenv filesize 69c00
INFO: CVI_USB_BREAK
NOTICE: Leave transfer loop
NOTICE: Application: disconnect
NOTICE: unbind()
NOTICE: USB stop
spinor id = C2 20 19
SF: Detected MX25L25645G with page size 256 Bytes, erase size 4 KiB, total 32 MiB
device 0 offset 0x0, size 0xa0000
Updating, 94% 6187636 B/s 655360 bytes written, 0 bytes skipped in 0.110s, speed 5886742 B/s
sf update speed 5.507 MB/s
Saving Environment to SPIFlash… Erasing SPI flash…Writing to SPI flash…done
OK

start usb task!
NOTICE: cvi_usb_hw_init
INFO: waiting for connection …
INFO: detect vbus …
INFO: bulkBufAlloc: 0000000081be4f00
INFO: cmdBufAlloc: 0000000081be5140
INFO: ep0BuffAlloc: 0000000081be4700
INFO: setup_buf: 0000000081be5380
INFO: handler: 0000000081be5400
INFO: cb0_buf: 0000000081be5810
INFO: cb1_buf: 0000000081be58a0
INFO: cb2_buf: 0000000081be5930
INFO: rsp_buf: 0000000081be59c0
INFO: acm_buf: 0000000081be5a10
NOTICE: Overwrite fip_src to FIP_SRC_USB
NOTICE: fip_src 6
NOTICE: bind()
NOTICE: Patch VID 3346
NOTICE: Patch VID 3346
NOTICE: USB enumeration done
NOTICE: connection speed: 3
SF: 4194304 bytes @ 0xa0000 Erased: OK
device 0 offset 0xa0000, size 0x300398
SF: 3146648 bytes @ 0xa0000 Written: OK
sf write speed 7.582 MB/s
NOTICE: CVI_USB_PROGRAM done
SF: 16777216 bytes @ 0x4b0000 Erased: OK
device 0 offset 0x4b0000, size 0x1000000
SF: 16777216 bytes @ 0x4b0000 Written: OK
sf write speed 7.688 MB/s
NOTICE: CVI_USB_PROGRAM done
SF: 11862016 bytes @ 0x14b0000 Erased: OK
device 0 offset 0x14b0000, size 0x144000
SF: 1327104 bytes @ 0x14b0000 Written: OK
sf write speed 7.413 MB/s
NOTICE: CVI_USB_PROGRAM done
NOTICE: CVI_USB_REBOOT

WD.C.SCS/0/0.WD.URPL.USBI.BS/EMMC.PS. E:load param1 (-78)
PS. E:load param1 (-78)
PS. E:load param1 (-78)
PS. E:load param1 (-78)
PS. E:load param1 (-78)
PS. E:load param1 (-78)
PS. E:load param1 (-78)
PS. E:load param1 (-78)
E:Boot failed (8).
E:ra=0x440a264
E:RESET:panic:-1

1 Like

WD.C.SCS/0/0.WD.URPL.USBI.BS/EMMC.PS.

Your output indicates the NOR strapping pin(s) are not configured correctly. When you correct this you will see NOR in the ROM bootloader, e.g.

WD.C.SCS/0/0.WD.URPL.USBI.BS/NOR.PS.

1 Like

and what is that? Is that an Image thing ?

1 Like

The Duo datasheet v1.2, section 2.6 on SPI Flash states the electrical pin configurations to trigger the ROM to boot from SPI NOR, i.e. 4k7 pull-up on MOSI and 4k7 pull-down on WP.

1 Like

Well from one issue to the next lol.

WD.C.SCS/0/0.WD.URPL.USBI.BS/NOR.PS. E:PARAM1 magic (0x0)
PS. E:PARAM1 magic (0x6876a1b0d16c09bf)
PS. E:PARAM1 magic (0x865a5369dd78ee89)
PS. E:PARAM1 magic (0x0)
PS. E:PARAM1 magic (0x0)
PS. E:PARAM1 magic (0x0)
PS. E:PARAM1 magic (0xd0002a007ac2711a)
PS. E:PARAM1 magic (0x0)

Something is wrong with the address or data written or being read from the flash. Perhaps there is too much interference. If that is the case, lower the speed when writing and reading this flash chip. I have never got the USB updater to work, so maybe there’s an issue there. Write the image to flash using the TF card update method and retry. That method does work.

1 Like

I have tried both the usb tool and TF card flash tbh. Do you know what address exactly does the mcu expect the bootloader? Because its being flashed at 0xA0000.

1 Like

Bootloader is at 0x0 so please check your partition_spinor.xml. Here’s my log of writing to that SPI NOR flash chip.

Hit any key to stop autoboot:  0 
## Resetting to default environment
Start SD downloading...
switch to partitions #0, OK
mmc0 is current device
433152 bytes read in 21 ms (19.7 MiB/s)
spinor id = EF 40 19
SF: Detected W25Q256JV-IQ with page size 256 Bytes, erase size 4 KiB, total 32 MiB
device 0 offset 0x0, size 0x69c00
433152 bytes written, 0 bytes skipped in 4.649s, speed 95345 B/s
sf update speed 0.93 MB/s
Saving Environment to SPIFlash... Erasing SPI flash...Writing to SPI flash...done
OK
64 bytes read in 1 ms (62.5 KiB/s)
Header Version:1
3146592 bytes read in 142 ms (21.1 MiB/s)
device 0 offset 0xa0000, size 0x300320
3146528 bytes written, 0 bytes skipped in 33.586s, speed 95925 B/s
sf update speed 0.93 MB/s
64 bytes read in 1 ms (62.5 KiB/s)
Header Version:1
16777280 bytes read in 745 ms (21.5 MiB/s)
device 0 offset 0x4b0000, size 0x1000000
16179200 bytes written, 598016 bytes skipped in 176.0s, speed 98112 B/s
sf update speed 0.95 MB/s
1015872 bytes read in 49 ms (19.8 MiB/s)
device 0 offset 0x14b0000, size 0xf8000
1015808 bytes written, 0 bytes skipped in 11.4s, speed 94502 B/s
sf update speed 0.92 MB/s
cv180x_c906# 

And booting Linux.

cv180x_c906# reset
resetting ...
C.SCS/0/0.WD.URPL.USBI.BS/NOR.PS.PE.BS.BE.J.
FSBL Jb28g9:gd039f43d2-dirty:2024-08-02T12:42:15+01:00
[...]
Hit any key to stop autoboot:  0 
spinor id = EF 40 19
SF: Detected W25Q256JV-IQ with page size 256 Bytes, erase size 4 KiB, total 32 MiB
device 0 offset 0xa0000, size 0x400000
SF: 4194304 bytes @ 0xa0000 Read: OK
sf read speed 31.775 MB/s
## Loading kernel from FIT Image at 81400000 ...
   Using 'config-cv1800b_milkv_duo_spinor' configuration
   Trying 'kernel-1' kernel subimage
     Description:  cvitek kernel
     Type:         Kernel Image
1 Like

This is mine

Start SD downloading...
switch to partitions #0, OK
mmc0 is current device
433664 bytes read in 22 ms (18.8 MiB/s)
spinor id = C2 20 19
SF: Detected MX25L25645G with page size 256 Bytes, erase size 4 KiB, total 32 MiB
device 0 offset 0x0, size 0x69e00
   
Updating, 69% 2783492 B/s
433664 bytes written, 0 bytes skipped in 0.135s, speed 3217912 B/s
sf update speed 3.11 MB/s
Saving Environment to SPIFlash... Erasing SPI flash...Writing to SPI flash...done
OK
64 bytes read in 2 ms (31.3 KiB/s)
Header Version:1
3146728 bytes read in 143 ms (21 MiB/s)
device 0 offset 0xa0000, size 0x3003a8
   
Updating, 10% 2809392 B/s   
Updating, 21% 2923302 B/s   
Updating, 29% 2766988 B/s   
Updating, 49% 3552709 B/s   
Updating, 59% 3388575 B/s   
Updating, 73% 3535380 B/s   
Updating, 93% 3881787 B/s
3146664 bytes written, 0 bytes skipped in 0.835s, speed 3845088 B/s
sf update speed 3.723 MB/s
64 bytes read in 2 ms (31.3 KiB/s)
Header Version:1
16777280 bytes read in 746 ms (21.4 MiB/s)
device 0 offset 0x4b0000, size 0x1000000
   
Updating, 2% 1946157 B/s   
Updating, 3% 2170736 B/s   
Updating, 5% 2326044 B/s   
Updating, 8% 2770897 B/s   
Updating, 11% 3401619 B/s   
Updating, 13% 3318916 B/s   
Updating, 16% 3283419 B/s   
Updating, 17% 3182047 B/s   
Updating, 20% 3286518 B/s   
Updating, 20% 3074319 B/s   
Updating, 23% 3175834 B/s   
Updating, 25% 3137867 B/s   
Updating, 27% 4460544 B/s   
Updating, 30% 4886528 B/s   
Updating, 30% 5021696 B/s   
Updating, 32% 5267456 B/s   
Updating, 33% 5505024 B/s   
Updating, 36% 5935104 B/s   
Updating, 37% 3084288 B/s   
Updating, 39% 3233792 B/s   
Updating, 40% 3348480 B/s   
Updating, 42% 3502080 B/s   
Updating, 45% 3733504 B/s   
Updating, 46% 3854336 B/s   
Updating, 49% 4069376 B/s   
Updating, 52% 4282368 B/s   
Updating, 54% 4493312 B/s   
Updating, 56% 3076096 B/s   
Updating, 58% 3211264 B/s   
Updating, 60% 3301376 B/s   
Updating, 62% 3433813 B/s   
Updating, 63% 3513002 B/s   
Updating, 64% 3573077 B/s   
Updating, 67% 3716437 B/s   
Updating, 68% 3796992 B/s   
Updating, 70% 3874816 B/s   
Updating, 71% 3954005 B/s   
Updating, 73% 3034112 B/s   
Updating, 74% 3094528 B/s   
Updating, 75% 3133440 B/s   
Updating, 78% 3240960 B/s   
Updating, 80% 3347456 B/s   
Updating, 82% 3429376 B/s   
Updating, 85% 3536896 B/s   
Updating, 86% 3595264 B/s   
Updating, 88% 3655680 B/s   
Updating, 89% 2984345 B/s   
Updating, 91% 3032678 B/s   
Updating, 93% 3112960 B/s   
Updating, 95% 3167846 B/s   
Updating, 97% 3230105 B/s   
Updating, 98% 3278438 B/s   
Updating, 99% 3297280 B/s   
Updating, 100% 3353804 B/s
16777216 bytes written, 0 bytes skipped in 5.983s, speed 3355443 B/s
sf update speed 2.799 MB/s
1327168 bytes read in 62 ms (20.4 MiB/s)
device 0 offset 0x14b0000, size 0x144000
   
Updating, 33% 4360415 B/s   
Updating, 49% 2832516 B/s   
Updating, 67% 2699926 B/s   
Updating, 85% 2620240 B/s   
Updating, 97% 2356942 B/s
1327104 bytes written, 0 bytes skipped in 0.567s, speed 2379955 B/s
sf update speed 2.300 MB/s

I dont think this is even writing to the flash or its just not disabling write protection. i will try to read the flash from another mcu to see if the data is similar to the files

Yeh it has garbage data…lol. My board is either defective or the sf utility has trouble with this chip