8051 core inside CV1800B


I notice that CV1800B has i8051 core inside.
Is there any details about memory mapping from i8051 view and any samples?


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really? Where did you find that?

From the spec (info, memory mapping region and registers).

“[en][full][milk-v]CV180ZB_CV1800B_CV1801B_Preliminary_Datasheet_V0300 20230621.pdf”

3.12.2 Characteristics

Configuration of the subsystem:

The 8051 microprocessor has the following features:

  • Supports standard 8051 instruction set
  • Frequency range of 25MHz ~ 300 MHz
  • Debugging functions: single-step execution / jump2pc / snapshot PSW, DPTR, PC
  • Supports 32-bit data access
  • Reset vector can be configured to system AHB SRAM/ DRAM/ SPINOR
  • Supports WFI (Clock gating)
  • Supports code banking (maximum 64x64 KB)
  • Provides 8KB of AHB SRAM space, which can be used by 8051 as instructionTCM or temporary storage for data
  • Provides 2 sets of 32-bit counters for timing and counting functions, whichcan be used by applications to implement timing and counting, or bytheoperating system to implement system clocks.
  • Provides 1 set of WDT for system interrupt or reset signal after a certainperiod of time in case of system exception.
  • Provides 1 set of external SPINOR control.
  • Provides interrupt controller for managing interrupt sources.
  • Provides 2 sets of Mailbox for communication between ACPUand8051.
  • Provides 1 set of I2C.
  • Provides 1 set of UART.

But the description is incomplete and missing some details. :frowning:

was anyone able to successfully use this 8051 core?

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I am also curious. The datsheet says it has 6KB of SRAM, but elsewhere I see 8KB.

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