CV1800B PLIC exception

Hi there,

I am trying to run baremetal programs on the Milk V Duo using Fiptool. I was successful in having some blinking LEDs and LCD display, however, I wanted to play with interrupts. That lead me to the PLIC (which is on address 0x70000000) but when I try to read the enable bit for the particular timer interrupt (in M-mode!!!), the CPU gives me an exception with exception 5, which means “Load instruction access error exception”.

Does anyone know how to solve this issue?

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Is that timer interrupt allowed to be accessed by that core? Just wondering, I’m far from experimenting bare metal yet.

I think I solved it. I was running my program on top of OpenSBI which had set-up the environment “for me”. When I tried to access the PLIC, it was an illegal memory access. When I removed OpenSBI and just let my program be directly booted by the 2nd stage bootloader, it works fine!

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Really curious about baremetal. I know there’s another thread on this forum that gives some tantalizing detail, but so far no one has published any code - just some rough handwaving in the general direction of the first-stage bootloader. Would love to see someone post a github repo with code.

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The only repo I found that talks about bare metal development on the Milk V Duo is this one: GitHub - unicornx/bm4duo . Unfortunately, the majority of it is in Chinese (which is not surprising but I don’t speak any). There are a lot of great examples.

I am working on my bachelor thesis and I will be probably using the Milk V Duo (and the CV1800B processors). I will document everything and in some time, I’ll post it in a public GitHub repository.

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Looking forward to seeing what you manage to find out and achieve. I’m sincerely interested in developing something funny and/or useful on Duo boards.

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Good luck wth your thesis and thanks for the pointers.

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That is great. Anxious to see your development.

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