Debugging and flashing the main RISC-V core on the Duo

Hi there,

I am looking for a RISC-V CPU on a board that could be used for an operating system created during a university course. Currently, the OS the students are building is ran in an emulator which can be debugged easily. We are thinking about making some real hardware excercises that could be developed for a real board.

The kernel of this OS uses the S-mode and virtual address translation, that’s why we need to use the main core on the Duo. However, we need to enable the students to be able to debug the OS running on the board as well.

In an ideal scenario, we would be able to flash the OS directly to the board from the computer the student is using (with something like OpenOCD) and then expose a port through OpenOCD to which a GDB session could be mounted to.

The main concern is the main core on the Duo does not have any flash – it is provided through the SD card. Is flashing directly to the SD card through a debugging interface even possible? Does the core support CMSIS-DAP or any other similar debugging protocols?

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