Milkv V Pioneer Performance issue with SG2042

I bought a MilkV-Pioneer system which has SG2042 (64 core XuanTie C920)
Claimed dhrystone dmips for XuanTie C920 is 5.8 (as per product breif)
But I am getting only 4.9!
And I never see ipc > 2, as per cpu spec, C920 is a 4 wide machine, so i am accepting max ipc to be 4 (or close to 4)

Can anyone provide any insight into this ?

What toolchain are you using to compile the benchmark suite with? What compile flags are you using? What platform are you running on?

You will probably need to be using the Xuantie toolchain and compile with something like this for optimal performance:

-mcpu=c920 -mabi=lp64d -O3 -mtune=c920 -g -mrvv-vector-bits=128

Binaries for the latest version of that toolchain as a cross-compiler from x86_64 are available here:

https://occ-oss-prod.oss-cn-hangzhou.aliyuncs.com/resource/1705395627867/Xuantie-900-gcc-linux-5.10.4-glibc-x86_64-V2.8.1-20240115.tar.gz

The mainline Clang and GCC releases are sadly not optimized for this chip as far as I am aware.

This is especially the case concerning the lack of autovectorized code generation due to lack of support for RVV 0.7 in the mainline kernels and Clang and GCC (although there is some hope that may change on the Kernel side).

Due to those toolchain and kernel issues, I don’t think any existing binary-based Linux distribution is yet optimized for this chip except for RevyOS:

RevyOS provides comprehensive adaptation and optimization support for chips such as c906fdv, c910v, and c908. By default, it integrates support for the RVV0.7.1 and XThead GCC toolchains. Furthermore, it is equipped with glibc and kernel optimized for the RVV0.7.1 instruction set.

They have Pioneer-compatible SG2042 images available here:

https://mirror.iscas.ac.cn/revyos/extra/images/sg2042/

However, last time I tried I couldn’t get them to boot on my Pioneer so YMMV.

Also, there’s some more context here on potential issues running the Pioneer with current mainline toolchains and distros:

https://www.reddit.com/r/RISCV/comments/18zfxg2/comment/kghu0v9/?utm_source=share&utm_medium=web2x&context=3

https://www.reddit.com/r/RISCV/comments/18zfxg2/comment/kgj5v08/?utm_source=share&utm_medium=web2x&context=3

I’ve seen similar comments in various other places but can’t track all of them down at the moment.

Anyway, all of that might have something to do with seeing less than optimal performance.

Getting the most out of this system is going to require having a fairly specialized development environment and there’s currently not much in the way of resources for making that easy to achieve.

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The big problem I’m seeing here is that some hidden away source that isn’t ever going to be upstreamed, at least from what it looks like. Compiling with -mcpu or -mrvv-vector-bits creates non-portable binaries that may not for instance run on a VisonFive 1/2, Nezha or other boards. Patched toolchain or not, it’s a total nightmare and freak show to package a distro for riscv64 with those, thus low performance is expected: if not relying on outdated toolchains, with custom patches and having to build a full slew of packages multiple times?

All well meaning intentions aside, I’m personally avoiding revyos for above reasons. It’s just not future proof unless it’s upstreamed. Till then, I’ll live with the performance an up to date GNU or LLVM toolchain can give me.

Now, let’s get back to building a working kernel… sigh