RuyiSDK Community Weekly Digest (September 11, 2025)
RuyiSDK is an open-source project initiated by PLCT Lab, designed to provide RISC-V developers with a convenient and comprehensive development environment. It offers the latest hardware information and software support, including details on supported devices. On the software side, it provides images (e.g., RevyOS), toolchains, package managers, and more1,2.
Its ultimate goal is to create a complete and convenient development environment for RISC-V developers, promote RISC-V as a mainstream architecture, and build a thriving community for developer collaboration. RuyiSDK aims to go global, offering development convenience to RISC-V developers worldwide.
PLCT Lab is committed to becoming a leading open-source organization in compiler technology, driving innovation in software infrastructure like toolchains and runtime systems, and possessing the technical and managerial capabilities to develop and maintain critical infrastructure. Simultaneously, it aims to cultivate 10,000 top talents in the compiler field and promote the adoption and development of advanced compiler technologies in China.
This Week’s New Topics
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FalconTech Showcases AI Processor Agile Development at RISC-V Ecosystem Conference
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RISC-V Working Committee Meets with Shanghai Pudong Software Park and FalconTech
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SiFive Launches New RISC-V IP Combining Scalar, Vector and Matrix Operations
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SiFive Second Generation Analysis: RISC-V in AI Acceleration Era
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Andes Technology Announces D23-SE: Functional Safety RISC-V Core for Automotive Applications
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Xuantie Collaborates with MCT Haoli Intelligence on Automotive-Grade Positioning Chips
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Loft Federal Wins NASA Task Order for Fault-Tolerant RISC-V Flight Computer
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Debian 13.1 Released: Focuses on Security Fixes and System Stability
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Ubuntu 25.10 Coming in October with Linux 6.17 Kernel and GNOME 49 Desktop
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Switzerland Releases National Open-Source Large Model Apertus
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Kimi K2 0905 Now Available on SophNet with 256K Context Support
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Endogenous Complexity-Based Brain-like Pulse Large Model “Transient 1.0” Released
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Invitation: FalconTech Invites You to 2025 China RISC-V Ecosystem Conference
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Countdown to RustChinaConf 2025 & Rust Global China Conference
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Shanghai AI Lab Large Model Center Joins AI Infra Working Group
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BML: Designing RISC-V SoC on FPGA - Part 5: Memory Access for Femto-CPU
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deepin Community August Report: deepin 25.0.7 Core Optimizations
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JiaChen Plan Launches RISC-V Software Performance Tracking Platform
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Reference openGauss RISC-V’s Cross-Platform Packaging Solution
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Xiangshan Open-Source Processor: Enabling Agile Architecture Research
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Imagination PowerVR Driver with Linux 6.18 to Support RISC-V
Note: All links redirect to Chinese discussions at ruyisdk.cn. Timestamps reflect Beijing Time (UTC+8).